U.S. patent number 3,831,065 [Application Number 05/348,753] was granted by the patent office on 1974-08-20 for electronic push button combination lock.
This patent grant is currently assigned to Integrated Conversion Technology. Invention is credited to Ricky Martin, Paul Quinn.
| United States Patent |
3,831,065 |
| Martin , et al. |
August 20, 1974 |
ELECTRONIC PUSH BUTTON COMBINATION LOCK
Abstract
The electronic lock includes a plurality of push buttons which
are sequentially actuated to provide a series of output binary
signals. These signals are successively compared with a series of
stored coded signals in a plurality of circuits which are caused to
be successively actuated by a ring counter, a correct comparison
providing an advance signal for the ring counter so that the next
stored coded binary signal can be compared with the next applied
output binary signal from the push button console. If the input
code corresponds correctly with the codes in the coded circuits,
the ring counter will complete its complete count, the last stage
of the counter providing an unlocking signal to open the lock.
|
Inventors: |
Martin; Ricky (Santa Ana,
CA), Quinn; Paul (Anaheim, CA) |
|
Assignee: |
Integrated Conversion
Technology (Anaheim, CA)
|
| Family
ID: |
23369397 |
| Appl.
No.: |
05/348,753 |
| Filed: |
April 6, 1973 |
| Current U.S.
Class: |
340/5.54;
340/5.22; 340/5.7 |
| Current CPC
Class: |
G07C
9/0069 (20130101) |
| Current International
Class: |
G07C
9/00 (20060101); E05b 049/00 () |
| Field of
Search: |
;317/134 ;307/1AT
;70/278 ;340/147B,147MD,149A,149R,164R,146.2 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Miller; J. D.
Assistant Examiner: Moose, Jr.; Harry E.
Attorney, Agent or Firm: Pastoriza & Kelly
Claims
What is claimed:
1. An electronic push button combination lock comprising, in
combination:
a. a plurality of push buttons corresponding to a plurality of
different numbers respectively;
b. a decimal to binary converter circuit connected to said push
buttons for providing an output binary signal in response to
depression of a selected button equivalent to the number associated
with the selected button;
c. a comparator circuit having a first input receiving said output
binary signal and a second input receiving a coded binary
signal;
d. a given number of coded circuits each providing a coded binary
signal upon actuation for reception in the second input of said
comparator circuit;
e. a ring counter having a number of stages one greater than said
given number of coded circuits, the first and subsequent stages
being connected to said coded circuits respectively to successively
actuate the same when the connected stage is energized and the last
stage providing an unlocking signal; and,
f. a lock responsive to said unlocking signal to open, said
comparator generating an advance signal to the counter to advance
it to the next successive stage whenever said output binary signal
corresponds to said coded binary signal, and generating a reset
signal to reset said ring counter whenever said output binary
signal does not correspond to said coded binary signal
whereby said lock will not open unless a sequence of push buttons
are depressed to provide successive output binary signals which
equal the successive coded binary signals supplied by the coded
circuits in response to the successive actuation of the stages of
the ring counter.
2. An electronic lock according to claim 1, including a timer
connected to said ring counter and responsive to generation of said
unlocking signal to reset said counter to its first stage after a
given period of time.
3. An electronic lock according to claim 1, including a code insert
system to enable the successive code binary signals in said given
number of coded circuits to be changed to new codes from a remote
location, said code insert system including: a code insert multiple
bit shift register for effecting a serial to parallel conversion of
successive bits of code information, said given number of coded
circuits being connected to the parallel conversion output of said
code insert multiple bit shift register; and a data signal line
means providing a series of code pulses representing the new codes
connected to the serial input of said code insert multiple bit
shift register to provide said successive bits of code information
from a remote location.
4. An electronic lock according to claim 3, in which said data
signal line means providing said series of code pulses includes a
first line carrying a series of uniformly spaced clock pulses and a
second line carrying a control data wave from defining the new
codes for gating certain ones of the clock pulses to form said
successive bits of code information in accordance with the new
codes.
5. The subject matter of claim 3, wherein there are provided a
plurality of additional electronic locks at different stations all
identical to said electronic lock, said electronic lock and
additional electronic locks each including individual address
responsive means comprising: an address multiple bit shift register
for effecting a serial to parallel conversion of successive bits of
address information; an address comparator having a first input
connected to the parallel conversion output of said address
multiple bit shift register; an address code identifying the
particular electronic lock connected to a second input of said
address comparator; an address signal line means providing a series
of address pulses representing the address code connected to the
serial input of said address multiple bit shift register to provide
said successive bits of address information; and a gate connected
between said data signal line means and said code insert multiple
bit shift register and controlled by an open gate signal from said
address comparator to open and permit a new code to be inserted,
said open gate signal from said address comparator only being
generated when the address code supplied by said address signal
line means corresponds with the address code identifying the
particular electronic lock.
6. The subject matter of claim 5, in which said address signal line
means providing said series of address pulses includes a first line
carrying a series of uniformly spaced clock pulses and a second
line carrying a control data wave form defining the address for
gating certain ones of the clock pulses to form said successive
bits of address information in accordance with the address code
identifying the particular electronic lock.
7. An electronic push button combination lock including in
combination:
a. a plurality of push buttons corresponding to a plurality of
different numbers respectively;
b. a decimal to binary converter circuit connected to said push
buttons for providing an output binary signal in response to
depression of a selected button equivalent to the number associated
with the selected button;
c. a comparator circuit having a first input receiving said output
binary signal and a second input receiving a coded binary
signal;
d. a given number of coded circuits each providing a coded binary
signal upon actuation for reception in the second input of said
comparator circuit; and
e. a ring counter having a number of stages one greater than said
given number of coded circuits, the first and subsequent stages
being connected to said coded circuits respectively to successively
actuate the same when the connected stage is energized and the last
stage providing an unlocking signal, said comparator generating an
advance signal to the counter to advance it to a next successive
stage whenever said output binary signal corresponds to said coded
binary signal, and generating a reset signal to reset said reing
counter whenever said output binary signal does not correspond to
said coded binary signal
whereby said unlocking signal will only be provided if push buttons
are depressed in a sequence to provide successive output binary
signals which equal the successive coded binary signals supplied by
the coded circuits in response to the successive actuation of the
stages of the ring counter.
Description
This invention relates generally to locks and more particularly to
an improved electronic push button combination lock particularly
useful for locking the doors to rooms in hotels or motels.
BACKGROUND OF THE INVENTION
Every year hotels and motels incur an enormous loss in keys. Most
of this loss is accounted for by inadvertent carrying away of the
key by a guest.
The foregoing problem is solved if combination locks are provided
for doors. Conventional combination locks, however, require that
the guest memorize his combination in order that only he can gain
access to his room. It would be possible, of course, to set the
combination lock to a particular combination of numbers with which
the guest was already familiar; for example, the date of his
birthday or his automobile license number or some other code
wherein the problem of the guest having to memorize a number is
avoided. This solution with conventional combination locks is
unsatisfactory because of the enormous time involved in resetting
the combination lock each time a new guest arrives. Moreover, it
would present problems to the manager of the hotel or motel in
keeping track of the various combinations for each room.
Nevertheless, the use of a combination type of lock would be
preferable to the key type if a convenient type of combination lock
could be devised wherein the code could readily be changed without
having to take the lock apart at each individual room.
BRIEF DESCRIPTION OF THE PRESENT INVENTION
With the foregoing in mind, the present invention contemplates an
electronic push button combination lock wherein the particular
combination for opening the lock can very easily be set into the
lock and wherein it is very simple for a guest to thereby gain
access to his room by simply pushing in proper sequence a series of
the push buttons.
Basically, the invention contemplates a means for generating an
output code such as a series of push buttons operable by a person
seeking to open the lock. The lock in turn includes means for
storing a given code. Comparator means are provided which receive
the output code and given code and compare the same, the comparator
means providing a given signal only when the output code
corresponds to the given code. Finally, means are provided
responsive to the given signal to provide an unlocking signal which
opens the lock.
The stored given code is established by a plurality of circuits
each capable of storing a given number of bits of information such
as a binary code. With such circuits, it is a very simple matter to
electronically change the particular stored code in each of the
circuits so that the entire combination can readily be changed at
will.
BRIEF DESCRIPTION OF THE DRAWINGS
A better understanding of the electronic push button combination
lock of this invention will be had by referring to the accompanying
drawings in which:
FIG. 1 is a block circuit diagram of the electronic combination
lock; and,
FIG. 2 is a table showing an example of a particular combination
set into the electronic lock of FIG. 1; and,
FIG. 3 is a system to change the combination.
DETAILED DESCRIPTION OF THE INVENTION
Referring to FIG. 1 the electronic lock includes a plurality of
push buttons 10 which when depressed will close a suitable switch
to connect power to a decimal to binary converter circuit 11. The
various push buttons are numbered with the digits 0, 1, 2, 3, 4, 5,
6, 7, 8, and 9. The buttons themselves may be formed in a
rectangular array such as found on an adding machine.
The decimal to binary converter 11 serves to generate an output
binary signal in response to depression of a selected button
equivalent to the number associated with the selected button. This
output binary signal also referred to as an output code or part of
an output code may constitute, by way of example, four bits of
information designated by the letters A', B', C' and D'. As shown,
this code is received in a first input of a comparator 12. The
comparator 12 includes a second input for receiving a stored given
code also in the form of a binary signal from a selector 13. This
given code may also constitute four bits of information designated
by the letters A, B, C, and D.
A given number of coded circuits 14, 15, 16 and 17, by way of
example, each provide a coded binary signal upon actuation for
reception through the selector 13 to the second input of the
comparator circuit. Actuation of the coded circuits 14 through 17
is effected by corresponding stages in a ring counter 18.
In the particular example chosen for illustrative purposes, the
ring counter 18 has five stages; that is, the number of stages is
one greater than the given number of coded circuits. The first and
subsequent stages of the ring counter are connected to the coded
circuits respectively as shown by the leads from the first four
stages of the ring counter the arrangement being such that
energization of any one stage of the ring counter will actuate its
connected coded circuit.
The fifth stage of the ring counter when energized provides an
unlocking signal through a relay coil 19 which may connect to a
lock 20 to throw a bolt or striker and open the lock.
The comparator 12 is connected to the ring counter 18 by an advance
lead connection 21 which provides a signal to advance the ring
counter to a next stage whenever a correct comparision is made in
the comparator 12. Also there is provided a reset signal lead 22
for providing a reset signal from the comparator to the ring
counter 18 whenever the comparison made by the comparator 12 is
incorrect.
The circuit is completed by the provision of a timer 23 connected
to receive the unlocking signal from the fifth stage of the ring
counter 18 which functions to reset the ring counter after a given
period of time as measured from the moment that the unlocking
signal is generated.
Each of the coded circuits 14, 15, 16, and 17 include four bits of
information defining a binary code the four circuits together
making up an overall given code stored in the lock.
FIG. 2 is a table illustrative of a specific combination binary
code set into the lock. Thus, for circuit 1 the binary code is 0111
and when circuit 1 designated 14 in FIG. 1 is actuated by a signal
from the first stage of the ring counter 18, the binary code 0111
will be passed through the selector 13 to appear on the second
input A, B, C, and D of the comparator 12. The second coded circuit
15 indicated as circuit 2 has a binary code 0100 and similarly this
particular binary code is applied to the comparator when the
circuit 2 is actuated by energization of the second stage of the
ring counter.
In a similar manner the circuits 3 and 4 include binary codes 0101
and 0010 respectively. The decimal equivalent of these binary
signals respectively is the number 7452 and thus for the example
chosen, the number 7452 constitutes the combination of the
electronic lock.
OPERATION OF FIG. 1
In operation, the ring counter is always reset to its first stage.
Assuming that the coded circuits 14, 15, 16, and 17 each include
the four bit binary code information as described in conjunction
with FIG. 2, a person may readily unlock the lock by depressing in
sequence the various push buttons in FIG. 1 corresponding to the
code 7452. These particular push buttons are circled in FIG. 1.
For example, when the guest entering the room presses the first
push button 7, the decimal to binary converter 11 will provide the
binary equivalent to the decimal number 7 which binary equivalent
is 0111, this binary signal appearing on the output code lead A',
B', C', and D' in the first input of the comparator 12. Since the
first stage of the ring counter is energized to actuate the first
coded circuit 14, the input leads A, B, C, and D to the second
input of the comparator 12 will have the binary code 0111. The
comparator circuit will now compare these two binary numbers and
since they are identical, an advance signal will be sent from the
comparator to the ring counter to advance the ring counter from its
first stage to its second stage.
When the ring counter is advanced to its second stage, the coded
circuit is energized to provide the code 0100 to the second input
of the comparator 12.
The guest next depresses the push button 4, the binary equivalent
thereof applied to the first input of the comparator 12 being 0100.
Since this code again corresponds to that applied to the second
input of the comparator, an advance signal is again applied to the
ring counter to advance the ring counter to the third stage.
The third stage code 0101 is then compared with the output code
applied by the push button 5 and again since the output code
corresponds to the given code, the ring counter is again advanced
to energize the last coded circuit 17.
Assuming the guest then depresses the last number 2 of the code,
the output binary signal 0010 at the first input of the comparator
will be compared with the given code from the coded circuit 17 and
since these binary numbers correspond, an advance signal will be
applied to the ring counter 18 to energize its last or fifth
stage.
When the fifth stage of the counter 18 is energized, the solenoid
coil 19 receives an unlocking signal to open the lock 20.
Simultaneously, the counter 23 is energized to start a given time
period running after which the ring counter 18 is automatically
reset to its first stage.
Should the guest depress the wrong button any place in the
sequence, an incorrect comparison will be made in the comparator 12
causing a reset signal to be generated on the lead 22 to reset the
ring counter 18 to its first stage.
It should be understood that the comparator 12 only operates when
one of the push buttons 10 is in a depressed state so that the
advance and reset signals will only pass to the ring counter while
a selected button 10 is held closed.
Since the coded circuits 14 through 17 are made up of simple
one-off memory circuits; for example, simple flip flops, the
particular code can easily be changed. Thus a particular
combination of numbers which is very easy for a guest to remember
can readily be inserted in the electronic combination lock.
Referring now to FIG. 3 a suitable address and combination code
inserting circuit for selecting a particular room combination lock
and inserting a desired code is shown.
In FIG. 3, the electronic lock portion is identical to that
described in FIG. 1 except that the circuits 14, 15, 16 and 17 of
FIG. 1 are incorporated in a large selector block designated 24.
The other components of the electronic lock portion in FIG. 3 are
designated by the same numerals as the corresponding components
shown in FIG. 1.
Essentially the code insert system of FIG. 3 enables the successive
coded binary signals in the given number of coded circuits
designated CKT. 1, CKT. 2, CKT. 3 and CKT. 4 in the selector block
24 to be changed to new codes from a remote location. Towards this
end, the system includes a code insert multiple bit shift register
25 for effecting a serial to parallel conversion of successive bits
of code information. The circuits 1 through 4 in the selector 24
are connected to the parallel conversion output of the shift
register 25 as shown by the letters A, B, C, D for each of the
circuits. A data signal line means includes a data line 26 carrying
a control data wave form and a line 27 providing a series of
uniformly spaced clock pulses. The data wave form essentially gates
certain ones of the clock pulses which are fed into the serial
input of the shift register 25 in the form of successive bits of
code information in accordance with the new codes to be supplied to
the circuits in the selector 24.
In the situation depicted in FIG. 3, there are provided a plurality
of additional electronic locks at different stations all identical
to the electronic lock shown in FIG. 3. Such stations are indicated
in the lower right hand portion of FIG. 3 by the block labeled STA
1 and by the block STA 2 which might, for example, constitute
different rooms in a motel each provided with individual electronic
locks. The complete electronic lock system shown in detail in FIG.
3 is designated STATION N.
In order to insert a new code in any one particular electronic lock
associated with a particular room, an address system is provided so
that only the particular lock selected can receive the new code
information. This address system is provided for each of the
electronic locks.
Thus, for STATION N the address system includes an address multiple
shift register 28 for effecting a serial to parallel conversion of
successive bits of address information. This address information
may be provided from the same data line 26 as by branch lead 29 in
conjunction with a series of clock pulses provided on a line 30,
certain of these pulses being gated by the address wave form on the
data line 29 to provide the successive bits of address information
into the register 28. The parallel conversion outputs of the
register 28 connect to a first input of an address comparator 31.
The second input to the address comparator 31 is provided with an
address code identifying the particular electronic lock. This
address code is indicated at 32 and in the example chosen includes
a four digit number 1100. Thjis number is provided in binary form
to the second input of the comparator for comparision with the
parallel conversion output of the register 28 passing to the first
input of the comparator. If the input address code to the
comparator corresponds with the particular address code identifying
the electronic lock from the second inputs 32, an open gate signal
will be provided by the comparator on line 33 to a gate 34
positioned between the clock providing the series of code pulses in
the serial input to the code insert multiple bit shift register 25
thus opening this register to receive the data designating the new
codes.
Referring to the bottom portion of FIG. 3, there is shown a clock 1
designated 35 for providing the series of pulses utilized in the
address code, a clock 36 providing the series of code pulses for
inserting the new codes and a data generating circuit 37 for
providing an address wave form cooperating with the clock 1 and a
combination code data wave form for cooperation with the clock
2.
The components 35, 36 and 37 may be at a remote location such as
the clerk's office in a hotel or motel. All of the information
necessary to address a particular electronic lock associated with a
particular room and to insert a desired code can be carried on the
three leads designated 38, 39, and 40. (There would, of course, be
provided a common return or ground lead not shown).
OPERATION OF FIG. 3
As stated heretofore, it will be understood that there is provided
an electronic lock together with a code insert and address system
for each particular station or room in the hotel or motel. Input
leads such as 30, 27, and 26 passing to the electronic lock and
associated insert and address equipment in STATION N are tapped off
from the main lines 38, 39, and 40 from the remote station. The
designated stations 1 and 2 shown in the blocks of FIG. 3
constitute other electronic locks with the necessary input leads
being taken in parallel from the leads 38, 39, and 40.
With respect to the lock at STATION N as shown in FIG. 3, assume
that it is desired to insert a new code to provide new binary code
signals from the circuits 1, 2, 3, and 4 in the selector 24 to thus
provide a new combination to the room. This operation can be
effected from a remote location by the clerk. Assuming that the
room number or identification address for STATION N is 1100 as
indicated at 32, the clerk will first address this particular
station by sending out clock pulses from clock 1 designated 35 in
the lower left portion of FIG. 3. In the example where there are
provided four coded circuits in the combination lock, the code
insert multiple bit shift register is a 16 bit shift register and
the clock 1 will provide 16 uniformly spaced pulses in time.
Simultaneously, the data wave from designating the address
identification 1100 will be transmitted from the data block 37.
This wave form essentially gates certain of the pulses from the
clock 1 to provide a series of address pulses designating the
binary address code in a serial form. The two pieces of information
will pass on the leads 38 and 40 to the leads 30 and 26
respectively.
The data on the lead 26 will be passed by the branch lead 29 into
the serial input of the address multiple bit shift register along
with the clock pulses on line 30.
The bits of address information corresponding to the identifying
address number 1100 are shown above the address data wave form from
the data block 37 in the lower portion of FIG. 3. Thus, the
identifying numbers 1100 at 32 fed into the second input of the
comparator 31 in binary form will be: 0001 0001 0000 0000. Since
this same binary code is received in the first input of the
comparator from the address multiple bit shift register 28 as a
consequence of the data fed into the serial input thereof, the
address comparator 31 will generate an open gate signal to the gate
34 and thus ready the code insert multiple bit shift register 25 to
receive a new code for changing the combination of the electronic
lock.
The various other stations would have different identifiying
addressed numbers and thus could be individually address by sending
a proper address code in the manner described for the STATION N to
ready their corresponding code insert multiple bit shift registers
to receive a new combination.
Assume now that the combination of the electronic lock is to be
changed to the number 7452 which is the number of the combination
utilized in the description of the electronic lock of FIG. 1. The
clerk at the remote station will now generate pulses from clock 2
designated 36 at the lower portion of FIG. 3 to provide sixteen
uniformly spaced time pulses. At the same time, the data block 37
will be caused to generate a data wave form which gates the pulses
from clock 2 in such a manner as to serially define in binary form
the combination 7452. This combination in binary form is shown as:
0111 0100 0101 0010.
When this data is received on the line 26 to the serial input of
the shift register 25 along with the pulses from clock 2 on line 27
which can now pass through the open gate 34, the shift register
will insert the four binary numbers into the circuits designated 1,
2, 3, and 4 in the selector 24.
After the code has been inserted, the clerk may send a second
series of 16 clock pulses from clock 1 to the address multiple bit
shift register 28 which will provide a binary number to the
comparator 31 which does not correspond to any particular station
identifying address number. As a consequence, the address
comparator will cease providing the open gate signal to close the
gate 34 and thus prevent additional data sent along the line 40
from thereafter affecting the electronic lock in STATION N.
With the combination 7452 now set into the circuits 1, 2, 3, and 4,
the electronic lock may be operated precisely as described for the
electronic lock of FIG. 1.
It will be understood, of course, that while only a five stage
counter has been shown cooperating with four coded circuits, a ring
counter with many more stages could be provided with additional
coded circuits. Similarly, the multiple bit registers 25 and 28 of
FIG. 3 could be made to handle more than sixteen bits of
information so that a great many different combinations can be
coded into the lock and a great many more rooms can be individually
addressed.
It should also be understood that while the invention has been
described with respect to an electronic lock for room doors, the
circuit set forth can be used to operate any particular mechanism
since the solenoid coil 19 can effect other functions when
energized aside from specifically throwing a bolt or striker. The
term "lock" should therefore be considered in its figurative sense
rather than as confined to a specific functioning of locking or
unlocking a door.
The invention, accordingly, is not to be thought of as limited to
the particular examples set forth merely for illustrative
purposes.
* * * * *