Television Type Display System For Displaying Waveforms Of Time-varying Signals

Abstract

Television display system for displaying waveforms of time-varying signals. The displayed waveforms move across the display screen. Several different waveforms may be displayed at the same time, each moving at a different rate. Alphanumeric characters which remain fixed in position may also be displayed on the same screen.

Description

BACKGROUND OF THE INVENTION

This invention relates to display systems. More particularly, it is concerned with apparatus for producing television-like displays of waveforms of time-varying signals.

In the past the well-known oscilloscope has served as a display device for providing a visual image of repetitive, high-speed signals. The signal waveform typically is displayed upon the cathode ray tube of the oscilloscope by sweeping the cathode ray beam horizontally across the tube in a particular period of time to provide a time base and by varying the vertical position of the beam during a horizontal sweep in accordance with the amplitude of the signal.

Apparatus of this type is widely used and it works particularly well for providing visual images of repetitive, high-frequency signals. However, the oscilloscope is not particularly well suited to provide a satisfactory display of non-repetitive signals when only a single trace of each signal can be placed on the surface of the tube.

One class of signals of this type which are of particular significance are physiological signals such as electrocardiographic and other measurements for monitoring the life signs of a human being, in particular, a patient in an intensive care unit of a hospital. The waveforms developed from the information sensed are relatively slow and often are non-repetitive. Strip-chart recorders which continuously plot the amplitude of the waveforms while calibrated paper is moved along the direction of the time axis are widely employed for producing visual displays of these signals. These devices are particularly useful whenever it is desired to provide a visual image which is to be retained. However, strip-chart recorders usually produce large quantities of unwanted paper, and by virtue of their mechanical nature have poor frequency response and are subject to various forms of mechanical difficulties.

More recently there has been developed television-like display apparatus in which a waveform appears to move across the face of a cathode ray tube simulating the viewing of a strip-chart recorder display through a window. In apparatus of this type the data is written into a memory at a slow real-time rate and is read out quickly and repetitively in synchronism with the raster scanline pattern for display on the cathode ray tube. The data in the memory is replaced as new data is obtained and the stored data is employed to continually update the display on the cathode ray tube during repeated sweeps of the raster scanline pattern.

Apparatus of this type typically employs a digital delay line as a medium for storing the data. The length of the delay line is selected so that the data recirculates at such a rate that each slow incoming sample replaces the oldest piece of data in the memory, thus gradually updating the memory so that it contains a history of the most recent information. The data recirculates at such a rate that as the data is read out for display, the most recent data is displayed at one edge of the screen and the oldest stored data at the opposite edge. Constant replacing of the old data with new data causes the displayed image to move across the screen simulating the viewing of a strip-chart recorder display through a window.

The apparatus produces a bright, clear image of the waveform since the waveform is continuously being retraced and updated similar to the usual television display. However, apparatus of this type heretofore available have certain limitations. Since the memory is usually a recirculating delay line, the rate at which data moves through the memory is fixed. If several waveforms are to be displayed on the screen, they must move across the screen at the same rate, or at best at fixed multiples of each other. In addition, the delay line can feed data out only in the order in which it was entered, a limitation which does not permit the storage of additional non-moving data. Further, in systems employed heretofore, the digital data is reconverted to analog data after being read out of the memory and utilized to reconstruct the waveform shape on the display surface. This approach has limitations in the case of signals with high frequency components, and also restricts the manner in which the waveform shape may be constructed in order to produce an image suitable for viewing.

SUMMARY OF THE INVENTION

An improved apparatus in accordance with the present invention for displaying time-varying signals includes means for receiving a time-varying signal and sampling means for periodically sampling increments of the signal. The apparatus also includes means for converting the sampled increments of the signal to digital representations thereof and memory means for storing a predetermined number of the digital representations. The most recent digital representation is loaded into the memory means in place of the oldest digital representation stored therein by an input control means.

The apparatus includes display means of the type producing images on a display surface by selectively writing on the display surface while repeatedly sweeping a raster scanline pattern over the display surface. Output means coupled to the memory means and to the display means cause digital representations read out of the memory means to produce on the display surface images of the digital representations. Output control means cause the digital representations stored in the memory means to be read out in synchronism with the sweeping of the raster scanline pattern to cause images of the most recent digital representations to appear at one edge of the display and images of the oldest digital representations to appear at the opposite edge of the display.

Apparatus in accordance with the invention may also provide further for displaying additional information, such as alphanumeric characters, in fixed positions on the same display surface. The apparatus includes means for receiving the additional information in digital code words. A predetermined number of these words are stored in a second memory means. The words are loaded in storage locations in the second memory means corresponding to positions on the display surface by a second input control means. A second output means is coupled to the second memory means and to the display means for causing words read out of the second memory means to produce on the display surface images representative of the additional information encoded in the words. A second output control means causes the words stored in the second memory means to be read out in synchronism with the sweeping of each raster scanline pattern to cause the images representative of the additional information encoded in the words stored in the second memory means to appear in fixed positions on the display surface.

BRIEF DESCRIPTION OF THE DRAWINGS

Additional objects, features, and advantages of display systems in accordance with the present invention will be apparent from the following detailed discussion together with the accompanying drawings wherein:

FIG. 1 is a block diagram of a display system in accordance with the present invention;

FIG. 2 is a representation of the display surface of a display device employed in the system of FIG. 1 illustrating the display of time-varying waveforms and fixed alphanumeric characters;

FIG. 3 is a chart or map of a random access digital storage memory employed in the system of FIG. 1 indicating the storage locations of waveform and alphanumeric character data;

FIG. 4 is a chart diagramming an input and output cycle of the memory;

FIG. 5 is a diagram illustrating the manner in which images of waveform data are combined to construct a waveform shape on the display surface of the display device of the apparatus;

FIG. 6 is a chart useful in explaining the operation of the system of FIG. 1 in reading out waveform data from the memory for display on the display device; and

FIG. 7 is a block diagram of a counter employed in addressing the memory to control the reading out of alphanumeric character data from the memory for display on the display device.

DETAILED DESCRIPTION OF THE INVENTION

GENERAL DESCRIPTION

A display system in accordance with the present invention which is particularly adapted for use in monitoring physiological signals is illustrated in block diagram form in FIG. 1. FIG. 2 illustrates the display surface of a television-type cathode ray tube display 10 employed with the system of FIG. 1. As shown in FIG. 2, a moving waveform, for example, an electrocardiographic waveform, is displayed on the face of the cathode ray tube. In the embodiment shown only the upper quadrent of the display surface is used for displaying the waveform. New data is entered at the right of the waveform and precesses across the display unit it disappears at the left. In addition to the moving waveform, alphanumeric characters which remain fixed in position may also be displayed on the display surface. Similarly, independent waveforms and alphanumeric characters appear in the other three quadrants on the display surface, although not illustrated in FIG. 2.

Thoughout the present description actual values of a specific embodiment of the invention are given. It is believed that the use of a single set of specific related values simplifies the explanation of the invention. However, it should be borne in mind that many variations and modifications are obviously possible within the scope of the invention.

In the apparatus as illustrated in FIG. 1 four different analog waveform signals (one for display in each of the four quadrants on the display surface of the display device 10) may be received on four different input channels applied to the inputs of four respective input amplifiers 11, 12, 13, and 14. The amplifiers are employed to adjust the signal amplitudes and offset biases and to filter out high frequency noise. The analog waveform signals from the amplifiers are applied to a multiplexer 15 where they are sampled sequentially at a rate of approximately 240 samples per second for each waveform under the control of signals from an oscillator 30 and divider and gates arrangement 31. The time-multiplexed sampled increments are applied to an analog-to-digital converter 16, and the digital data is stored in a register 17.

The stored digital data in the register 17 is loaded into a random access digital storage memory 25 by a multiplexer 18. The appropriate address for each piece of digital data is controlled separately for each channel by respective input counters 32, 33, 34, and 35. The input counters receive input pulses at individually selected rates. The pulses are generated by the oscillator 30, and the rates at which they are applied to the input counters is determined by settings of manually-operated rate control switches 29 which control the divider and gates arrangement 31. The states of the input counters 32, 33, 34, and 35 designate the storage locations in the memory 25 in which the most recent digital data stored in the register 17 from the corresponding waveform input channels is to be stored. This address information is applied to the memory 25 through multiplexers 36 and 28. Thus, the storage addresses of incoming data and the rate at which it is accepted for storing is individually controlled for each waveform.

Alphanumeric information is applied to the system at an alphanumeric input and loaded into an alphanumeric register 27. The alphanumeric information received includes digital code words each designating an alphanumeric character and an address code designating the storage location in the memory 25, which code also designates the position of the character on the display. The alphanumeric data passes through the multiplexer 18 and the address data passes through multiplexer 28 causing the alphanumeric data to be stored in the proper location in the memory 25.

Waveform data is read out of the random access digital storage memory 25 under control of the input counters 32, 33, 34, and 35 and output counters 71, 72, 73, and 74. The counts stored in the input counters 32, 33, 34, and 35 are loaded into the output counters 71, 72, 73, and 74. The output counters count downward on clock pulses and the count information is applied through a multiplexer 57 and the multiplexer 28 to address the storage locations of the random access digital storage memory 25 to be read out. As will be explained in more detail hereinbelow, two adjacent pieces of data on each waveform are read out of the memory 25 and loaded into a waveform previous register 41 and a waveform present register 42. The data in these registers is compared in a comparator 44, and then appropriately loaded into a small number counter 51 and a large number counter 52. These counts control the operation of a flip-flop 54, the output of which passes into a summing network 55 to become part of the composite video signal applied to the display device 10.

Readout of the alphanumeric data from the memory 25 is controlled by an alphanumeric refresh address counter 60. The address information is applied to the memory 25 through the multiplexer 28. The alphanumeric data readout of the memory 25 passes to an alphanumeric code register 43 and from there to an alphanumeric character generator 45 which also receives information from the alphanumeric refresh address counter 60. The output of the alphanumeric character generator 45 is applied to a register 53 from which it passes through the summing network 55 to become part of the composite video signal applied to the display device 10.

Also shown in FIG. 1 is a master timer 61 which supplies timing and control signals to the various portions of the apparatus including the horizontal and vertical synchronizing signals which enter the composite video signal through the summing network 55. These signals are repetitive over each operating cycle of the apparatus during the sweeping of a complete raster frame over the face of the display device 10. The master timer 61 is, therefore, an element of straightforward design for providing a multitude of synchronized pulses at different frequencies which are appropriately gated to the other elements of the apparatus so as to properly coordinate operations throughout the system.

In the specific embodiment of the apparatus described herein the waveforms from four channels of physiological information are displayed on the display device 10. As illustrated in FIG. 2, each waveform is displayed within a different one of the four vertically arranged quadrants on the display surface of the display device 10. Each waveform appears to move from right to left across the display with the newest data appearing at the right and the oldest data appearing at the left. Each waveform may be made to precess, for example, at rates which present from 3.7 to 14.8 seconds of data for display at one time. Each quadrant of the display surface may also display up to four rows of alphanumeric characters. Up to 32 characters may be displayed in each row. The characters displayed may be selected from the full ASCII repertoire of 64 characters.

The display device employs a high resolution raster of 1023 scanlines with odd and even lines interlaced in alternate fields. Each individual scanline sweeps vertically from the top to the bottom of the display and the raster of scanlines is swept across the display from the right edge to the left edge. The raster scanline pattern is swept at a rate of 60 fields per second, or 30 complete frames per second. The period of each scanline is 32.5 microseconds. Each scanline has an active trace period of 26 microseconds (6.5 microseconds per quadrant) and a retrace time of 6.5 microseconds. Of the total of 1023 scanlines swept through in a complete frame 896 scanlines are employed for the display.

As illustrated in FIG. 2 each quadrant of the display is divided into five sectors 62, 63, 64, 65, and 66. The first, second, fourth, and fifth sectors 62, 63, 65, and 66 contain the four rows of alphanumeric characters. (Only three rows are utilized for displaying characters in the illustration of FIG. 2). All five sectors of the quadrant are utilized to display the waveform. The maximum vertical excursion of each waveform encompasses 128 evenly-spaced points along the vertical height of the quadrant. The waveform illustrated in FIG. 2 has maximum and minimum points which are well within the possible limits. The digital data representing each sample of the waveform designates one of the 128 points corresponding to the amplitude of the sample. Each alphanumeric character including the spacing to the next character, encompasses a width of 14 raster scanlines in both the odd and even fields.

Memory

FIG. 3 is a map of the random access digital storage memory 25. The memory may be any of the various well-known types of random access memories, such as an MOS type. In the specific embodiment shown herein the memory is a 4096-word memory with seven-bit words. The memory is organized into four 1024-word groups, each corresponding to a different quadrant of the display. Each quadrant includes 896 seven-bit stages containing 896 digital representations of samples of the waveform of the corresponding channels, one stage for each active vertical scanline of the display. The seven-bit stages permit encoding of data to designate one of the 128 vertically arranged points in the appropriate quadrant of the display.

In addition, each quadrant includes 128 six-bit stages (the seventh bit in each stage is not used) for containing digital code words representing alphanumeric characters. Each stage is associated with a specific one of the 32 character positions of one of the four rows of alphanumeric characters to be displayed in the quadrant of the display. The six-bit words permit encoding to designate any one of the 64 possible alphanumeric characters available for display.

The stages of the memory 25 for containing the waveform data are addressed in sequence for writing into the memory so that the oldest stored data is replaced by the most recent data received. The stages are addressed for reading out of the memory so that the data is displayed on the display surface with the most recent data at the right and the oldest data at the left. Alphanumeric data applied to the memory is associated with address data for storing the data in predetermined stages, which when addressed at readout designate specific positions on the display.

Data Input

Information received at each of the four waveform input channels is sampled by the multiplexer 15, the sampled increments converted to digital format by the analog-to-digital converter 16, and the digital data stored in the register 17. Data in the register is loaded into the proper stage of the memory 25 to replace the oldest stored piece of data related to the same waveform. For each channel the waveform is sampled and the data in the register 17 is updated at the rate of approximately 240 times per second. The rate at which data transferred from the register 17 to the memory 25 is stored in the memory and the addresses of the stages in which data is stored are determined by the input counters 32, 33, 34, and 35.

Each of the input counters 32, 33, 34, and 35 is a modulo-896 counter. Each state of a counter designates a stage of the memory 25 for the corresponding quadrant. This address information passes from the input counters through the multiplexer 36 and the multiplexer 28 to the memory 25. Thus, data is loaded in sequence into the 896 stages of each quadrant of the memory.

The rate at which data is entered into the memory is determined by the rate at which each input counter changes state, or the rate of input pulses to the counter. As explained previously, the input to the counters is individually determined by the manually-operated rate control switches 29 which set the output gates of the divider and gates arrangement 31. A single oscillator 30, which in the specific embodiment operates at a frequency of approximately 960 hertz is shown in FIG. 1. In order to avoid problems of timing interference, the oscillator 31 is synchronized by the master timer 61 to produce one pulse for every 32 scanlines. Pulses from the oscillator 30 are applied to the counters 32, 33, 34, and 35 by the divider and gates 31 at sub-multiples of this rate, specifically either approximately 240 hertz, 120 hertz, or 60 hertz, as selected by the rate control switches 29. Individual oscillators and other pulse rates may be employed with some increase in the complexity of the circuitry in order to prevent timing interference.

Thus, the data presented to each waveform input channel may be located into its corresponding quadrant of the memory 25 at an individually selected rate which determines the rate at which the image of the waveform moves across the face of the display. This relationship will become more apparent from the discussion of the manner in which data is read out of the memory and presented to the display in a subsequent section of this application.

As mentioned previously, alphanumeric information is applied at the alphanumeric input in digital coded format and includes the memory address. The information is stored in the alphanumeric register 27. The alphanumeric character data is then passed through the multiplexer 18 and the address data through the multiplexer 28 to place the data in the proper stages of the memory 25.

FIG. 4 diagrams a cycle of writing information into the memory 25 and reading information out of the memory. Each cycle equals the period of a single vertical scanline (32.5 microseconds). Information is written into the memory during a time period equal to the retrace time of 6.5 microseconds. (Since there are propagation delays throughout the system, this portion of the cycle does not exactly coincide in real time with the retrace period of the cathode ray tube beam.)

As illustrated in FIG. 4 this portion of the cycle is divided into four operations. During the first operation the alphanumeric data stored in the alphanumeric register 27 is written into the memory by the multiplexers 18 and 28. During the second period the waveform data which is about to be replaced with new data may be read out. (The particular stages containing this data are designated by the states of the input counters 32, 33, 34, and 35.) This particular operation takes place only if it is desired to otherwise store or record the data before it is discarded.

During the third period the waveform data stored in the register 17 is written into the proper stages of the appropriate quadrants of the memory by the multiplexers 18, and 36 and 28. These are the only periods of the memory cycle which are utilized to write data in the memory 25. Since in the specific embodiment under discussion the memory 25 is a dynamic MOS type, a memory refresh period is provided during which the existing charges on the memory storage devices are restored, as is well understood in the art, to prevent loss of data by leakage.

Data Output

Waveform data is read out of the memory 25 for display under control of the input counters 32, 33, 34, and 35 and the output counters 71, 72, 73, and 74. The manner in which these elements address the memory to read data from the proper stages will be described in detail in a subsequent section of this application.

As indicated in the diagram of FIG. 4, for each scanline data pertaining to each waveform is read out of two stages of the memory 25. One piece of data is designated the "present" data which may be consdiered as corresponding to the specific scanline about to be traced. The other, designated the "previous" data, is stored in the stage of next lower order than the stage containing the present data, and concerns the sample of the waveform taken immediately preceding that related to the present data.

During the read waveform present period of the memory cycle (FIG. 4) the present data is read out of the appropriate stage of the memory 25 and stored in the waveform present register 42. During the read waveform previous period the data in the stage immediately preceding the stage containing the present data is read out of the memory and stored in the wavefrom previous register 41. The values of the data stored in the registers 41 and 42 are compared by the comparator 44 and a count equal to the smaller value is entered in the small number counter 51. A count equal to the larger value plus a small constant value is entered in the large number counter 52. In the system as illustrated each piece of data contains seven bits providing up to 128 possible values. In the particular case the smaller the value of the count the larger the amplitude or height of the sampled increment of the signal.

Clock pulses are applied to the small number and large number counters 51 and 52 by the master timer 61. These pulses are synchronized with the tracing of each vertical scanline of the cathode ray tube beam whereby 128 clock pulses correspond to 128 equally-spaced points along a scanline within a quadrant. The 128 clock pulses may correspond to the tracing across all five sectors of the first quadrant, for example.

The counters 51 and 52 count downward on the clock pulses. When the small number counter 51 reaches a count of zero, the flip-flop 54 is set. During the period the pulses are being counted, the scanline traces downward a distance which is equivalent to the time period measured by the count. With the flip-flop 54 in its set condition it produces an output signal to the summation network 55 which enters the composite video signal as an unblanking signal causing an image to be written on the surface of the cathode ray tube display 10. The beam thus begins writing at this point on the face of the cathode ray tube to provide a visual image representing the value of the count.

The writing on the face of the display device continues tracing a vertical line downward along the path of the scanline until the large number counter 52 counts downward to zero. When this event occurs, the large number counter 52 produces an output signal to the flip-flop 54 resetting the flip-flop 54. Thus, the signal to the summation network 55 is terminated and the unblanking signal is removed from the composite video signal whereby writing of the image ceases.

FIG. 5 depicts a small portion of the display surface of the display device 10 illustrating the manner in which images of waveform data are written on the surface to construct a visual image of a waveform. In FIG. 5 the waveform present data point corresponding to each scanline is indicated by a mark at the right of the written image. (These marks do not appear on the actual display, and are employed in FIG. 5 only for purposes of explanation.) It can be seen that the image written during each scanline begins at the point representative of the larger of the present or previous data values.

In the display shown in FIG. 5 it is assumed for purposes of illustration that there is no change in the data stored in the memory during the complete frame of both an odd and an even field. Thus, the previous data value for each scanline is the present value for the scanline immediately to its left. As explained previously, the complete image written during each vertical scanline extends from a point representing the larger value of the present or previous data to a point representing the smaller value. In addition, the written image extends downward an additional fixed distance, by virtue of the additional small constant value added to the large number counter 52, to provide a minimum base line throughout the waveform thereby producing a smooth curve with desirable viewing characteristics.

As indicated by the chart of FIG. 4 each of the four rows of alphanumeric code words are read out of the memory during different periods of the memory cycle. The alphanumeric code words are read out of the memory 25 under control of the alphanumeric refresh address counter 60 as will be explained hereinbelow and are stored in the alphanumeric code register 43. The character code data in the register 43 is applied to the alphanumeric character generator 45. The alphanumeric character generator 45 is also connected to the alphanumeric refresh address counter 60. The alphanumeric character generator 45 may be any of the well-known types of read only memories which provide appropriate output signals in response to the code information designating particular characters as supplied by the register 43 together with data identifying each particular dot column employed in constructing the character as supplied by the alphanumeric refresh address counter 60. In the specific embodiment being discussed, each alphanumeric character is constructed on the display of five vertical columns of dots plus two columns of spacing between adjacent characters. Each dot column is traced by four scanlines, two in each field, a total of fourteen scanlines per field. Since two scanline of each field trace through the same dot column, information as to odd or even fields is not required by the alphanumeric character generator 45. The output signals from the alphanumeric character generator 45 are stored in a parallel-to-serial converter register 53 and then shifted out to the summing network 55 to become part of the composite video signal to the display device 10.

Thus, for each vertical scanline appropriate waveform and alphanumeric data is read out of the memory 24, converted to appropriate signals, and entered into the composite video signal. The operation repeats for each quadrant during each scanline. There are propagation delays and buffering delays throughout the system. However, the fixed relationship of timing signals and delays in the various portions of the system are such that unblanking signals enter the composite video signal at the proper times so that images are written at the proper positions during each vertical scanline.

Data Output Control

As mentioned previously, the addresses of the stages containing the waveform data to be read out are controlled by the input counters 32, 33, 34, and 35 and the output counters 71, 72, 73, and 74. At the start of each field the contents of the input counters 32, 33, 34, and 35 are entered in the output counters 71, 72, 73 and 74, respectively. Thus, the output counters contain data identifying the stages of the memory in which are stored the most recent sampled data on the respective waveforms as of the beginning of the field. The pieces of data in these stages are the present waveform data for the first scanline in the odd field.

The output counters 71, 72, 73, and 74 are also modulo-896 counters arranged to count downward on clock pulses supplied by the master timer 61. In the system being described the output counters are arranged to count downward because successive pieces of data are placed in the memory at stages of successively higher order. Thus, in reading out data in reverse order (most recent data first, oldest data last) the stages must be addressed in downward order. The data is read out in reverse order because the raster scanline pattern sweeps across the display surface from right to left and the most recent data appears at the right of the display.

The manner in which the proper memory stages are addressed by the output counters for reading out data for each quadrant may best be explained by reference to the table of FIG. 6. For purposes of illustration it is assumed that the count of the input counters 32, 33, 34, and 35 as transferred to the output counters 71, 72, 73, and 74, respectively, at the start of an odd field are 215, 701, 2, and 105, respectively. For the first useable scanline in the odd field the count of 215 in the first output counter 71 is applied through the multiplexers 57 and 28 to address the 215th stage of the memory which contains the present data for the first quadrant of the first scanline. The data is read out of the 215th stage of the memory and entered in the waveform present register 42.

To obtain the address of the previous data, the first output counter 71 counts down by one to a count of 214. Stage 214 is addressed through the multiplexers 57 and 28 causing the data stored therein to be read out to the waveform previous register 41. The two pieces of data in the register 41 and 42 are processed as explained previously to produce unblanking signals in the composite video signal.

After the present and previous waveform data for the first quadrant has been read out of the memory, the second output counter 72 which contains a count of 701 addresses the 701 stage of the memory 25 through the multiplexers 57 and 28 as indicated in FIG. 6. The second output counter 72 then counts down by one to a count of 700, and this address information is applied to the memory 25 through the multiplexers 57 and 28. As indicated in FIG. 6, the foregoing procedures are repeated for addressing the memory to obtain the present and previous data for the first scanline of the waveform of the third and fourth quadrants.

Upon completion of the first scanline of the odd field, the first output counter 71 counts downward by one to start the second scanline in the odd field with a counts of 213. The displacement of the count by two from the count of 215 at the start of the first scanline is necessary because the scanlines are interlaced for the odd and even fields. Thus, the 213th stage of the memory is addressed to read out the present data for the first quadrant of the second scanline, and the 212th stage is addressed for the previous data. The procedure continues in order to address the memory for reading out the present and previous data for the other waveforms as controlled by the decreasing counts in the other output counters.

For the start of the third scanline in the odd field the starting count in the first output counter 71 is 211. The action continues until the odd field has been traced producing images of the waveforms on the display surface. Since the memory is continually being updated with more recent data during the time the odd field is being swept, the data in the last few stages which contained the oldest data at the start of the field are not displayed. In the specific embodiment as disclosed, the last eight stages in each address sequence for a field are not displayed in order to insure that no recently sampled increments of the waveforms will appear out of position.

After completion of the tracing of the odd field and at the start of the even field, the counts in the output counters 71, 72, 73, and 74 are replaced by the updated counts in the input counters 32, 33, 34, and 35, respectively. The addressing procedure is carried out in a similar manner for the even field in which the scanlines are traced between the scanlines of the odd field. Since under usual operating conditions new data was entered into the memory during the tracing of the odd field, the first stage addressed is of higher order. Thus, the data is displayed during the even field to the left of its position during the previous odd field producing an appearance of movement of the waveforms from right to left.

In contrast, the alphanumeric characters remain fixed in the same position on the display surface of the display device 10 during subsequent sweeps of the raster scanline pattern. As explained previously, the six-bit code words employed to designate any of 64 possible alphanumeric characters are read out of the memory and stored in the alphanumeric code register 43 for transfer to the alphanumeric character generator 45.

The addresses of stages to be read out are controlled by the alphanumeric refresh address counter 60 in a cyclical operation which is repeated for each field. The alphanumeric refresh address counter 60 addresses the proper stages of the memory and also provides information to the alphanumeric character generator 45 identifying the dot column of the character.

A more detailed block diagram of the alphanumeric refresh address counter 60 is shown in FIG. 7. The alphanumeric refresh address counter 60 includes a modulo-16 counter 62 the output of which is applied to a modulo-14 counter 63, the output of which in turn is applied to a modulo-32 counter 64. The master timer 61 supplies 16 periodic clock pulses to the modulo-16 counter 62 for each scanline. The count in the modulo-16 counter 62 is detected and applied to the memory 25 by way of multiplexer 28 to select the quadrant and also the row within the quadrant. The address information also includes a constant to restrict the address to stages 896 through 1023 of the memory 25.

The modulo-14 counter 63 receives one input pulse from the modulo-16 counter 62 for each vertical scanline. The count in the modulo-14 counter 63 is detected and applied to the alphanumeric character generator 45 to identify the dot column being traced as a particular one of the seven dot columns of a character. (Each dot column includes two scanlines of each field.) The modulo-14 counter 63 provides a pulse to the modulo-32 counter 64 for each 14 scanline (corresponding to the portion of a character displayed during one field). The detected count of the modulo-32 counter 63 combined with the row address information from the modulo-16 counter 62 provides the address to a particular stage of a quadrant of the memory. The memory address information passes from the alphanumeric refresh address counter 60 to the memory 25 through the multiplexer 28.

The operating cycle of the alphanumeric waveform refresh address counter 60 is identical for each field. Thus, the proper signals for writing the character are loaded into the parallel-to-serial register 53 and leave the register 53 at the proper time to combine with other signals in the summation network 55 to become part of the composite video signal as explained previously. Since the stages of the memory 25 are addressed at the same time during each sweep of the raster scanline pattern, the alphanumeric characters appear fixed in the same position on the face of the display despite the movement of the waveforms.

Conclusion

In summary, the system as shown and described receives time-varying analog waveform signals on any of up to four separate input channels and stores digital representations of samples of the signals in the random access storage memory 25. The time span of the portion of a waveform encompassed by the total number of stored representations may be varied individually by varying the input rate of pulses to the respective input counters 32, 33, 34, and 35 thereby controlling the rate at which waveform data is entered into the memory 25.

The stored waveform data for each channel is read out in sequence for each sweep of the raster scanline pattern and displayed visually on the display device 10 to produce a waveform with the most recent data at the right. As the data in the memory is continually updated, the waveform data appears to be moving from the right to the left of the display simulating a view of a strip-chart recorder through a window. Since the rate at which the data in the memory is updated is controlled by controlling the rate at which pulses are applied to the input counters 32, 33, 34, and 35, the time span encompassed by the data displayed and the rate at which a waveform moves across the display are also controlled thereby. The rate of entry of data into the memory can be controlled individually for each of the four channels. The rate of entry can be reduced to zero whereby the data stored in the memory does not change and the same portion of a waveform is displayed continuously on the surface of the display device with its movement frozen.

By virtue of the arrangements employed to store the waveform data and control the writing in and reading out of the data from the memory, additional information may be displayed in fixed positions on the display surface. As described herein up to four rows of 32 alphanumeric characters may be displayed in each quadrant in association with a waveform. Alphanumeric data is displayed in predetermined positions on the display surface by virtue of its address when written into the memory.

In addition, the apparatus as shown includes a timing mark generator 20. When activated, this generator operates on a timed multiple of the raster scanline time to insert an unblanking signal into the composite video signal at the summing network 55. For example, every 24th scanline of each field may be unblanked to produce a pattern of equally-spaced vertical double-lines on the display surface. An observer can count these timing marks to obtain a measure of the correspondence of a waveform to real time.

An erase code generator 19 when activated inserts a constant digital value into all the stages of the memory containing waveform data during the write waveform portion of a memory cycle (FIG. 4). Thus, all the stored waveform data is removed from the memory during a single retrace period so that the entire display is erased in a single frame.

During the read waveform portion of the memory cycle (FIG. 4) data may be read out of the stage of the memory containing the oldest stored data prior to its being replaced by the incoming most recent data. As explained previously, this data may be recorded for retention. In addition, the data in one quadrant may be read out, placed in a temporary register 26, and then reinserted through the multiplexer 18 in another quadrant of the memory. In this way two, three, or four display quadrants may be employed to display two, three, or four continuous portions of a single waveform, cascading the images from one quadrant to the next.

While there has been shown and described what is considered a preferred embodiment of the present invention, it will be obvious to those skilled in the art that various changes and modifications may be made therein without departing from the invention as defined in the appended claims.

Claims

What is claimed is:

1. Apparatus for displaying time-varying signals including in combination

means for receiving a time-varying signal;

sampling means for periodically sampling said signal;

means for converting the samples of the signal to digital representations thereof;

memory means for storing a predetermined number of said digital representations, the address of a digital representation placed in the memory means remaining the same until the digital representation is removed from the memory means and replaced by another digital representation;

input control means including first means for determining the address in the memory means of the oldest digital representation stored therein, and second means for loading the most recent digital representation into the memory means at the address of the oldest digital representation as determined by said first means, the most recent digital representation replacing the oldest digital representation, said first means updating the address of the oldest digital representation upon loading of each new digital representation by the second means;

display means of the type producing images on a display surface by selectively writing on the display surface while repeatedly sweeping a raster scanline pattern over the display surface;

output means coupled to the memory means and to the display means for causing the display means to produce on the display surface images of digital representations read out of the memory means; and

output control means including first means for reading out digital representations from the memory means in succession and second means for synchronizing the reading out of digital representations by the first means with the sweeping of the raster scanline pattern to cause images of the most recent digital representations to appear at one edge of the display and images of the oldest digital representations to appear at the opposite edge of the display.

2. Apparatus for displaying time-varying signals in accordance with claim 1 wherein

said memory means includes a random access memory means having a plurality of stages, each of which is capable of storing a digital representation;

said input control means is operable to load digital representations in sequence into said stages, each digital representation being loaded into a stage in place of the oldest digital representation stored in the memory means; and

said output control means is operable to read out digital representations from said stages in succession by addressing said stages in succession, the first stage to be addressed in a succession being changed during subsequent successions in accordance with the replacement of old digital representations by new digital representations, while the digital representations remain in the same stages except to be removed from the memory means and replaced by more recent digital representations, in order that images of the most recent digital representations appear at said one edge of the display and images of the oldest digital representations appear at said opposite edge of the display.

3. Apparatus for displaying time-varying signals in accordance with claim 2 including

rate control means coupled to said input control means for varying the rate of loading digital representations into stages of said memory means.

4. Apparatus for displaying time-varying signals in accordance with claim 2 wherein

said display means traces each individual scanline of said pattern in a direction substantially orthogonal to the line of direction from said one edge to said opposite edge of the display; and

said output means includes means for producing an output signal causing the display means to produce an image by writing on the display surface at a time during the tracing of a scanline to produce an image on the display surface at a point along the scanline corresponding to the value of the digital representation stored in the stage of the memory means being addressed by the output control means.

5. Apparatus for displaying time-varying signals in accordance with claim 1 wherein

said output means includes counting means for measuring a time period representative of the value of a digital representation read out of the memory means and for producing an output signal at the termination of the measured time period;

said display means being operable to produce images by writing on the display surface in response to an output signal from said counting means; and including

means for synchronizing the start of measuring each of said time periods with the sweeping of the raster scanline pattern to cause the output signal occuring during a sweep of the raster scanline pattern to write at times during the sweep to produce images at points on the display surface corresponding to the values of the digital representations.

6. Apparatus for displaying time-varying signals in accordance with claim 1 wherein

said display means traces each individual scanline of said pattern in a direction substantially orthogonal to the line of direction from said one edge to said opposite edge of the display;

said output means includes counting means for measuring a time period representative of the value of a digital representation read out of the memory means and for producing an output signal at the termination of the measured time period;

said display means being operable to produce images by writing on the display surface in response to an output signal from said counting means; and including

means for synchronizing the start of measuring each of said time periods with the tracing of a scanline to cause an output signal occurring during the tracing of a scanline to produce an image at a point along the scanline corresponding to the value of the digital representation.

7. Apparatus for displaying time-varying signals in accordance with claim 6 wherein

said counting means includes

first means for receiving a count representative of the value of a digital representation read out of the memory means,

second means for receiving periodic clock pulses and for producing an output signal when the number of clock pulses received equals the count received from said first means, and

third means for applying periodic clock pulses to said second means when activated; and

said means for synchronizing is operable to activate the third means of the counting means at the same point during each trace of a scanline.

8. Apparatus for displaying time-varying signals in accordance with claim 2 wherein

said output control means includes means coupled to said input control means for determining the stage of said memory means in which the most recent digital representation is stored.

9. Apparatus for displaying time-varying signals in accordance with claim 2 wherein

said input control means includes

input counting means for counting input clock pulses through a recurring sequence of states equal in number to the number of the plurality of stages in the random access memory means,

input pulse means coupled to the input counting means for applying periodic input clock pulses thereto,

said input counting means being coupled to the random access memory means and being operable to control the address of the stage in which a digital representation from said means for converting is loaded in accordance with the state of the input counting means whereby each input clock pulse causes a digital representation to be loaded in the next stage in a repeating succession corresponding to the recurring sequence of states of the input counting means; and

said output control means includes

means coupled to the input counting means for determining the state of said input counting means, and

output address means coupled to the random access memory means and to said last-mentioned means and operable to address said stages in sequence in accordance with the state of the input counting means in synchronism with the sweeping of the raster scanline pattern to cause digital representations to be read-out of the memory means in sequence and images thereof to appear on the display with the most recent digital representations at said one edge of the display and the oldest digital representations at said opposite edge of the display.

10. Apparatus for displaying time-varying signals in accordance with claim 9 including

rate control means coupled to said input pulse means and operable to vary the rate at which the input pulse means applies periodic input clock pulses to said input counting means.

11. Apparatus in accordance with claim 1 for displaying time-varying signals and further for displaying additional information in fixed positions on the same display surface, said apparatus further including

means for receiving said additional information in digital code words;

second memory means for storing a predetermined number of said words;

second input control means for loading said words into said second memory means in storage locations corresponding to positions on the display surface;

second output means coupled to the second memory means and to the display means for causing the display means to produce on the display surface images representative of the additional information encoded in words read out of the second memory means; and

second output control means for reading out the words in synchronism with the sweeping of each raster scanline pattern to cause the images representative of the additional information encoded in the words stored in the second memory means to appear in fixed positions on the display surface.

12. Apparatus in accordance with claim 2 for displaying time-varying signals and further for displaying additional information in fixed positions of the same display surface, said apparatus further including

means for receiving said additional information in digital code words;

second memory means for storing a predetermined number of said words including a random access memory means having a plurality of stages each of which is capable of storing a word, each stage corresponding to predetermined positions on the display surface;

second input control means for loading words into stages of said second memory means;

second output means coupled to the second memory means and to the display means for causing the display means to produce on the display surface images representative of the additional information encoded in words read out of the second memory means; and

second output control means for reading out the words from the stages of the second memory means in the same sequence during successive sweeps of the raster scanline pattern whereby images representative of the additional information encoded in the words appear in fixed positions on the display surface.

13. Apparatus for displaying time-varying signals and further for displaying additional information in fixed positions on the same display surface in accordance with claim 12 including

rate control means coupled to the first-mentioned input control means for varying the rate of loading digital representations into stages of said first-mentioned memory means.

14. Apparatus for displaying time-varying signals and further for displaying additional information in fixed positions on the same display surface in accordance with claim 12 wherein

said display means traces each individual scanline of said pattern in a direction substantially orthogonal to the line of direction from said one edge to said opposite edge of the display; and

said first-mentioned output means includes means for producing an output signal causing the display means to produce an image by writing on the display surface at a time during the tracing of a scanline to produce an image on the display surface at a point along the scanline corresponding to the value of the digital representation in the stage of the first-mentioned memory means being addressed by the first-mentioned output control means.

15. Apparatus for displaying time-varying signals and further for displaying additional information in fixed positions on the same display surface in accordance with claim 11 wherein

said display means traces each individual scanline of said pattern in a direction substantially orthogonal to the line of direction from said one edge to said opposite edge of the display;

said first-mentioned output means includes counting means for measuring a time period representative of the value of a digital representation read out of the first-mentioned memory means and for producing an output signal at the termination of the measured time period;

said display means being operable to produce images by writing on the display surface in response to an output signal from said counting means; and including

means for synchronizing the start of measuring each of said time periods with the tracing of a scanline to cause an output signal occurring during the sweep of a scanline to produce an image at a point along the scanline corresponding to the value of the digital representation.

16. Apparatus for displaying time-varying signals and further for displaying additional information in fixed positions on the same display surface in accordance with claim 15 wherein

said counting means includes

first means for receiving a count representative of the value of a digital representation read out of the first mentioned memory means,

second means for receiving periodic clock pulses and for producing an output signal when the number of clock pulses received equals the count received from said first means, and

third means for applying periodic clock pulses to said second means when activated; and

said means for synchronizing is operable to activate the third means of the counting means at the same point during each tracing of a scanline.

17. Apparatus for displaying a plurality of time-varying signals including in combination

means for receiving each of a plurality of time-varying signals;

sampling means for periodically sampling each of said signals;

means for converting the samples of each of the signals to digital representations thereof;

memory means having a plurality of sections, each for storing a predetermined number of digital representations of one of said signals, the address of a digital representation placed in the memory means remaining the same until the digital representation is removed from the memory means and replaced by another digital representation;

input control means including first means for determining the address in the memory means of the oldest digital representation stored in each section, and second means for loading the most recent digital representation of each signal into the associated section of the memory means at the address of the oldest digital representation of each signal as determined by said first means, the most recent digital representation of each signal replacing the oldest digital representation of the same signal, said first means updating the address of the oldest digital representation of each signal upon loading of each new digital representation of the same signal by the second means;

display means of the type producing images on a display surface by selectively writing on the display surface while repeatedly sweeping a raster scanline pattern over the display surface;

output means coupled to the memory means and to the display means for causing the display means to produce on the display surface images of digital representations read out of the memory means; and

output control means including first means for reading out digital representations of each signal from the memory means in succession and second means for synchronizing the reading out of digital representations by the first means with the sweeping of the raster scanline pattern to cause images of the most recent digital representations of each signal to appear at one edge of an associated section of the display and images of the oldest digital representations of each signal to appear at the opposite edge of the associated section of the display.

18. Apparatus for displaying a plurality of time-varying signals in accordance with claim 17 wherein

said memory means includes a random access memory means having a plurality of stages in each of said sections, each of said stages being capable of storing a digital representation;

said input control means is operable to load digital representations of each signal into the stages of the associated section, each digital representation of a signal being loaded in sequence into a stage in place of the oldest digital representation of the signal stored in the section;

said output control means is operable to read out digital representations stored in the stages of each section in succession by addressing said stages in succession, the first stage to be addressed in a succession being changed during subsequent successions in accordance with the replacement of the oldest digital representations of each signal by new digital representations, while the digital representations remain in the same stages except to be removed from the memory means and replaced by more recent digital representations, in order that images of the most recent digital representations of each signal appear at said one edge of the associated section of the display and images of the oldest digital representations of each signal appear at said opposite edge of the associated section of the display.

19. Apparatus for displaying a plurality of time-varying signals in accordance with claim 18 including

a plurality of rate control means coupled to said input control means for independently varying the rate of loading digital representations of each of said signals into stages of the associated sections of said memory means.

20. Apparatus for displaying a plurality of time-varying signals in accordance with claim 18 wherein

said output control means includes means coupled to said input control means for determining the stage of each section of said memory means in which the most recent digital representation of each signal is stored.

21. Apparatus for displaying a plurality of time-varying signals in accordance with claim 18 wherein

said input control means includes

a plurality of input counting means each associated with a section of said memory means for counting input clock pulses through a recurring sequence of states equal in number to the number of the plurality of stages in the associated section of the random access memory means,

input pulse means coupled to the plurality of input counting means for applying periodic input clock pulses thereto,

each of said input counting means being coupled to the associated section of the random access memory means and being operable to control the address of the stage in which a digital representation from said means for converting is loaded in accordance with the state of the input counting means whereby each input clock pulse counted by an input counting means causes a digital representation to be loaded in the next stage of the associated section of the random access memory means in a repeating succession corresponding to the recurring sequence of states of the associated input counting means; and

said output control means includes

means coupled to the plurality of input counting means for determining the state of each of said input counting means,

output address means coupled to the random access memory means and to said last-mentioned means and operable to address the stages of the associated section of the random access memory means in sequence in accordance with the state of the associated input counting means in synchronism with the sweeping of the raster scanline pattern to cause digital representations to be read out of the memory means in sequence and images thereof to appear on the display with the most recent digital representations of each signal at said one edge of the associated section of the display and the oldest digital representations of each signal at said opposite edge of the associated section of the display.

22. Apparatus for displaying a plurality of time-varying signals in accordance with claim 21 including

a plurality of rate control means coupled to said input pulse means and operable to independently vary the rate at which the input pulse means applies periodic input clock pulses to each of the plurality of input counting means.

23. Apparatus in accordance with claim 17 for displaying a plurality of time-varying signals and further for displaying additional information in fixed positions on the same display surface, said apparatus further including

means for receiving said additional information in digital code words;

second memory means for storing a predetermined number of said words;

second input control means for loading said words into said second memory means in storage locations corresponding to positions on the display surface;

second output means coupled to the second memory means and to the display means for causing the display means to produce on the display surface images representative of the additional information encoded in words read out of the second memory means; and

second output control means for reading out the words in synchronism with the sweeping of each raster scanline pattern to cause the images representative of the additional information encoded in the words stored in the second memory means to appear in fixed positions on the display surface.

24. Apparatus in accordance with claim 18 for displaying a plurality of time-varying signals and further for displaying additional information in fixed positions on the same display surface, said apparatus further including

means for receiving said additional information in digital code words;

second memory means for storing a predetermined number of said words including a random access memory means having a plurality of stages each of which is capable of storing a word, each stage corresponding to predetermined positions on the display surface;

second input control means for loading words into stages of said second memory means;

second output means coupled to the second memory means and to the display means for causing the display means to produce on the display surface images representative of the additional information encoded in words read out of the second memory means; and

second output control means for reading out the words from the stages of the second memory means in the same sequence during successive sweeps of the raster scanline pattern whereby images representative of the additional information encoded in the words appear in fixed positions on the display surface.

25. Apparatus for displaying a plurality of time-varying signals and further for displaying additional information in fixed positions on the same display surface in accordance with claim 24 including

a plurality of rate control means coupled to said input control means for independently varying the rate of loading digital representations of each of said signals into stages of the associated sections of said memory means.