U.S. patent number 3,689,755 [Application Number 05/072,724] was granted by the patent office on 1972-09-05 for engine control systems.
Invention is credited to Duncan Barry Hodgson, 90-Heathcote Road, GB2, Leamington, GB2, Malcolm Williams, 38, Willow Road, Solihull.
| United States Patent |
3,689,755 |
|
September 5, 1972 |
ENGINE CONTROL SYSTEMS
Abstract
An engine control system, particularly for a road vehicle,
includes two transducers for producing two signals representing any
two of the parameters engine speed, manifold pressure and throttle
angle. These signals provide input to a matrix which gives an n-bit
output determined by both input signals, where n is at least two.
This output controls an engine characteristic. This invention
relates to engine control systems generally, but is particularly
concerned with engines used in road vehicles, where it is often
required that the engine should be controlled to obtain some
desideratum, for example minimum exhaust emission, maximum fuel
economy or peak performance. The control will in most cases be of
the injection of fuel to the engine, but can, in the case of an
engine having a spark ignition system, be of the ignition timing,
or even a combination of timing and fuel injection. In essence, the
invention uses any combination of two parameters chosen from a
group of three engine parameters, namely engine speed, manifold
pressure (which of course can be a negative pressure) and through
angle, to provide two signals. These signals provide inputs to a
matrix, which can be a diode matrix or can use suitable
semi-conductor devices other than diodes. The matrix is designed to
give an n-bit output determined by both input signals, n being at
least two, and this output is used to control an engine
characteristic.
|
Inventors: |
Duncan Barry Hodgson, 90-Heathcote
Road (Whitnash), Leamington, GB2 (N/A), Malcolm
Williams, 38, Willow Road, Solihull (Warwickshire), GB2
(N/A) |
| Family
ID: |
10443016 |
| Appl.
No.: |
05/072,724 |
| Filed: |
September 15, 1970 |
Foreign Application Priority Data
|
|
|
|
|
| Sep 23, 1969 [GB3] |
|
|
46,904/69 |
|
| Current U.S.
Class: |
708/8;
261/DIG.74; 701/103; 123/486 |
| Current CPC
Class: |
G06F
1/03 (20130101); F02D 9/00 (20130101); F02D
41/2406 (20130101); F02P 5/15 (20130101); Y02T
10/46 (20130101); Y10S 261/74 (20130101); Y02T
10/40 (20130101); F02D 2700/0233 (20130101) |
| Current International
Class: |
F02D
41/00 (20060101); F02D 9/00 (20060101); F02D
41/24 (20060101); F02P 5/15 (20060101); G06F
1/03 (20060101); G06F 1/02 (20060101); G06g
007/26 (); G06j 001/00 () |
| Field of
Search: |
;235/197,150.5,150.21,152,150.53 ;73/116 ;318/301 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Joseph F. Ruggiero
Attorney, Agent or Firm: Holman & Stern
Claims
Having thus described our invention what we claim as new and desire
to
1. An engine control system for controlling an engine
characteristic comprising in combination a matrix unit having a
first set of input lines and a second set of input lines arranged
in groups of n lines, where n is at least two, with each line in
the second set crossing each line in the first set, and connections
being made between lines in the first and second sets in accordance
with the engine characteristic being controlled and the nature of
the required control, a first transducer producing a signal
representing a first engine parameter, means whereby the output
from the first transducer energizes one of the lines in the first
set, depending on the value of the parameter, a second transducer
producing a signal representing a second engine parameter, means
whereby the output from the second transducer energizes one of the
groups of n lines in the second set of input lines, and control
means having n input connections the first of which is connectible
to the first line in each group of n lines, the second of which is
connectible to the second line in each group of n lines and so on,
the arrangement being such that at any instant the energized group
of n lines is connected to the control means so that for given
values of the two engine parameters the control means receives a
n-bit digital input signal, dependent on the interconnections
between the energized line in the first set and the energized group
of lines in the second set, the control means serving to control
the engine characteristic in accordance with said input signal, and
wherein the two engine
2. An engine control system for controlling an engine
characteristic comprising in combination a matrix unit having a
first set of input lines and a second set of input lines arranged
in groups of n lines, where n is at least two, with each line in
the second set crossing each line in the first set, and connections
being made between lines in the first and second sets in accordance
with the engine characteristic being controlled and the nature of
the required control, a first transducer producing a signal
representing a first engine parameter, means whereby the output
from the first transducer energizes one of the lines in the first
set, depending on the value of the parameter, a second transducer
producing a signal representing a second engine parameter, means
whereby the output from the second transducer energizes one of the
groups of n lines in the second set of input lines, and control
means having n input connections the first of which is connectible
to the first line in each group of n lines, the second of which is
connectible to the second line in each group of n lines, and so on,
the arrangement being such that at any instant the energized group
of n lines is connected to the control means so that for given
values of the two engine parameters the control means receives a
n-bit digital input signal, dependent on the interconnections
between the energized line in the first set and the energized group
of lines in the second set, the control means serving to control
the engine characteristic in accordance with said input signal, and
wherein the two engine
3. An engine control system for controlling an engine
characteristic comprising in combination a matrix unit having a
first set of input lines and a second set of input lines arranged
in groups of n lines, where n is at least two, with each line in
the second set crossing each line in the first set, and connections
being made between lines in the first and second sets in accordance
with the engine characteristic being controlled and the nature of
the required control, a first transducer producing a signal
representing a first engine parameter, means whereby the output
from the first transducer energizes one of the lines in the first
set, depending on the value of the parameter, a second transducer
producing a signal representing a second engine parameter, means
whereby the output from the second transducer energizes one of the
groups of n lines in the second set of input lines, and control
means having n input connections the first of which is connectible
to the first line in each group of n lines, the second of which is
connectible to the second line in each group of n lines and so on,
the arrangement being such that at any instant the energized group
of n lines is connected to the control means so that for given
values of the two engine parameters the control means receives a
n-bit digital input signal, dependent on the interconnections
between the energized line in the first set and the energized group
of lines in the second set, the control means serving to control
the engine characteristic in accordance with said input signal, and
wherein the two engine
4. An engine control system as defined in claim 1, wherein the
engine
5. An engine control system as defined in claim 1, wherein the
engine
6. An engine control system as defined in claim 2, wherein the
engine
7. An engine control system as defined in claim 2, wherein the
engine
8. An engine control system as defined in claim 3, wherein the
engine
9. An engine control system as defined in claim 3, wherein the
engine characteristic is the ignition timing of the engine.
Description
The accompanying drawing is a schematic circuit diagram
illustrating one example of the invention as applied to a spark
ignition fuel injection internal combustion engine for a road
vehicle.
Referring to the drawing, a signal is produced by any convenient
transducer 8 representing one of the three variables, engine speed,
throttle angle and manifold depression, the signal being produced
in the form of a three bit binary word. Transducers are
commercially available which will sense engine speed and produce an
electrical output which can be provided in the form of a three bit
binary word, and similar transducers are available for giving a
three bit binary word representing throttle angle and manifold
depression. The exact details of these transducers are not
important to an understanding of the invention. Another three bit
binary word is produced by another transducer 9 which responds to
another of the three parameters, and the two words are fed
respectively to a pair of decoders 11 and 12. There are 8
combinations of each digital signal, and for each input signal, the
decoder 11 energizes one of eight input lines 13 of a diode matrix.
The decoder 12 energizes one of eight output lines 14 depending on
its input signal, and the lines 14 control a switching device 15
which can energize any one of eight groups of five lines 16 each of
which crosses each line 13, with connections made where required by
diodes which for simplicity are shown as dots. One output line 21
is connectible to the first line 16 in each group and four further
output lines 21 are connectible to the other four lines 16 in each
group, the lines 21 being coupled to a device 22 for controlling
the supply of fuel to the engine 23. The dotted connections within
the device 15 do not of course represent diodes.
The drawing shows only the diodes associated with the lines 13 and
the first two groups of input lines 16, but by way of example it
will be seen that, assuming 1 represents the interconnection of two
lines 13, 16, then if the first group of lines 16 are energized and
the eight lines 13 are energized in turn, the following output
signals will be obtained: 10000, 00100, 01001, 01100, 10100, 10010,
11111, and 01000. Similarly, if the second group is energized, the
output as the lines 13 are energized in turn will be 01100, 11001,
10101, 10000, 11001, 01101, 01111and 11000. It will of course be
appreciated that the term "energized" as applied to a group of
lines 16 means simply that the group of lines is in operation, that
is to say is connected to the device 22. This can be achieved in
numerous ways; for example, the switching device 15 can, on receipt
of an input on a line 14, provide base current to five transistors
serving through their collector-emitter paths to connect the
appropriate group of five lines 16 to the lines 21. It is
convenient to use metal oxide silicon (M.O.S.) transistor for this
purpose, because they are readily integrated.
It will be appreciated that although a five bit output is obtained
in the example, the value n in the claims can be from two upwards,
depending on the accuracy required. Some outputs may be the same,
indicating that the same fuel requirement is necessary for
different operating conditions. The exact determination of the
output for different inputs is made experimentally for a given
engine, after which the same matrix can be used for all such
engines. The signal, or a separately obtained signal, can be used
to control the ignition timing, and in some instances the ignition
timing alone can be controlled using as parameters engine speed and
throttle angle. The way in which the quantity of fuel and/or the
timing is controlled depends on the purpose of the control system,
but the arrangement is particularly intended for minimizing exhaust
emission.
The decoders 11 and 12 can take a variety of forms, and could for
example include transistors of n-p-n and p-n-p varieties arranged
so that a 1 signal turns on an n-p-n transistor and an 0 signal
turns on a p-n-p transistor. The transistors are connected in sets
of three in different n-p-n and p-n-p combinations with the
collector-emitter paths of a set of three transistors between a
voltage source and one of the lines 13 and 14, and the three bit
words are fed to the bases of the transistors, so that for example
the word 101 will cause conduction of the line 13 or 14 to which is
connected in series with three transistors having the combination
n-p-n, p-n-p, n-p-n. Conveniently, M.O.S. transistors are
employed.
The diode matrix can be produced in integrated form starting with
an n-type slice and diffusing into it p-type parallel rows which
represent the lines 13. At the crossing points of the lines 13, 16,
n-type zones are diffused into the strips to define diodes. Pair of
conductive strips are then produced extending across the parallel
rows and constituting the lines 16, and where a diode connection
between a line 16 and a line 13 is needed, the appropriate strip is
connected electrically to the n-type zone at the junction. It is,
however, preferred to use M.O.S. transistors in the matrix to
simplify production. Such a matrix conveniently has the rows 16
connected to a supply source through resistors respectively which
block unwanted conduction paths. A connection is made where
required from a line 13 to the drain of a M.O.S. transistor having
both its source and gate connected to the line 16 to which the line
13 is to be connected. Such an arrangement can be made in a single
diffusion starting with an n-type slice and diffusing parallel rows
of p-type material for the lines 13, together with pairs of rows of
eight separate p-type regions between the rows to constitute the
lines 16. The slice is metallized so that each row is capable of
constituting with its adjacent separate p-type regions M.O.S.
transistors with interconnected gates and sources. The electrical
connections are, however, only completed where a M.O.S. transistor
is actually required to interconnect a line 14 and a line 16. The
resistors can also be M.O.S. transistors, and so can the
transistors used to interconnect the lines 16 and 21 as described
earlier, so that the arrangement can be produced very simply in
integrated form, particularly where as described earlier the
decoders are constituted by M.O.S. transistors. It has been assumed
that the system voltage allows p-type M.O.S. transistors to be
employed, but if necessary n-type M.O.S. transistors can be used,
or if a p-type diffusion is preferable to an n-type diffusion in
manufacture, but the circuit requires n-type M.O.S. transistors,
then a phase inverter can be used to allow p-type M.O.S.
transistors to be employed. The phase inverter can itself be formed
by pairs of p-type M.O.S. transistors, which are integrated with
the rest of the circuit at very small cost and minimum
inconvenience.
It will of course be appreciated that other known techniques can be
employed to form the various circuits shown.
* * * * *