U.S. patent number 3,587,083 [Application Number 04/671,317] was granted by the patent office on 1971-06-22 for character generation and display system.
This patent grant is currently assigned to Xerox Corporation. Invention is credited to Matthew P. Tubinis.
| United States Patent |
3,587,083 |
| Tubinis |
June 22, 1971 |
CHARACTER GENERATION AND DISPLAY SYSTEM
Abstract
A character generation and display system for characters
comprised of a series of connecting line segments of various slopes
which are formed by deflection waveforms resulting from integrating
over a uniform period of time pulse trains having different
frequencies.
|
Inventors: |
Tubinis; Matthew P. (Penfield,
NY) |
|
Assignee: |
Xerox Corporation (Rochester,
NY)
|
| Family
ID: |
24694003 |
| Appl.
No.: |
04/671,317 |
| Filed: |
September 28, 1967 |
| Current U.S.
Class: |
345/18;
708/9 |
| Current CPC
Class: |
G09G
1/10 (20130101) |
| Current International
Class: |
G09G
1/06 (20060101); G09G 1/10 (20060101); G06f
003/14 () |
| Field of
Search: |
;340/324.1 ;343/5DP
;315/18,19,22 ;328/127 ;235/150.53,150.51,150.3 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Caldwell; John W.
Assistant Examiner: Curtis; Marshall M.
Claims
What I claim IS:
1. A character signal generating system for generating horizontal
and vertical deflection signals which control an electron beam to
trace any of a plurality of predetermined characters each of which
is composed of segments having various slopes and lengths, said
system comprising:
a. a horizontal integrator;
b. a vertical integrator;
c. a plurality of pulse generating means for generating a plurality
of pulse trains each having a different frequency, each of said
pulse generating means including a pulse train splitting circuit
means for splitting each of said pulse trains into a pair of split
pulse trains of like frequency to each other but of opposite
polarity with each other;
d. gating means for selectively gating in response to gate pulses
any one of said split pulse trains to said integrators; and,
e. means for generating in response to a code signal representative
of one of said predetermined characters any one of a plurality of
predetermined sequences of gate pulses to said gating means.
2. A system as defined in claim 1 wherein said gate pulses having
substantially the same pulse width.
3. A system for generating predetermined characters composed of a
plurality of successive straight line segments having various
lengths and slopes in a display unit having signal integrating
means for determining the slope and length of said segments
comprising:
a. a first plurality of conductors for signals representative of
deflections in one direction;
b. a second plurality of conductors for signals representative of
deflections in another direction substantially perpendicular to
said one direction;
c. means coupled to each of said conductors of said first and
second pluralities for generating on selected ones of said
conductors successive pulse trains during substantially uniform
time intervals indicative of segments of a particular character to
be displayed, at least one of said successive pulse trains having a
pulse repetition frequency different from that of another one of
said pulse trains; and,
d. means for coupling said first and second plurality of conductors
to said signal integrating means.
4. A system as defined in claim 3 wherein at least one of said
pulse trains has a polarity different from the polarity of another
one of said pulse trains.
5. A character signal generating system for generating horizontal
and vertical deflection signals which control an electron beam to
trace any of a plurality of predetermined characters each of which
is composed of segments having various slopes and lengths, said
system comprising:
a. horizontal means having an input for generating a horizontal
analog signal as a function of the number of pulses received
thereby;
b. vertical means having an input for generating a vertical analog
signal as a function of the number of pulses received thereby;
c. a first conductor coupled to the input of said horizontal
means;
d. a second conductor coupled to the input of said vertical
means;
e. a first plurality of gates, each having two inputs and an
output, said output being coupled to said first conductor;
f. a second plurality of gates, each having two inputs and an
output, said last recited output being coupled to said second
conductor;
g. a plurality of pulse splitting means for generating two
substantially identical output pulse trains of opposite polarity on
first and second outputs, respectively, in response to an input
pulse train at the input thereof, said output pulse trains having a
frequency dependent on frequency of said input pulse train;
h. means for coupling said first output to the input of at least
one of said gates in each of said pluralities of gates;
i. means for coupling said second output to the input of at least
one of said gates in each of said pluralities of said gates;
j. a plurality of pulse train generators each having an output
coupled individually to one of said pulse splitting means and each
having a different operational frequency; and,
k. means for selectively generating and applying any one of a
plurality of predetermined sequences of gate pulses to the input of
said gates of said first and second pluralities in accordance with
one of said predetermined characters.
Description
This invention relates generally to character generation and, more
specifically, to generation of a large number of alphanumeric
symbols utilizing a plurality of line segments.
With the ever increasing use of high speed computers for the
generation of data and other graphic communication, it is desirable
to provide a high speed character generator which is capable of
rendering a visual display of computer generated data and other
graphic information. Any display system must be reliable as well as
compatable with the speed of the data which it is designed to
display. Electromechanical systems are no longer acceptable to the
present computer environment for reasons of speed and mechanical
complexity. Therefore, there exists a great need for a high speed
electronic character generation and display system.
It is an object of the present invention to provide an improved
system which generates deflection and blanking voltage signals
necessary to control the display of various characters.
Another object of the present invention is to improve the
generation of stroke-type characters for display by cathode-ray
tubes.
These and other objects which may become apparent are accomplished
in accordance with the principles of the present invention wherein
a number of pulse generators having different frequencies are
selectively coupled to an integrating circuit to provide a linear
waveform of a slope and duration which is a function of the
frequency of the pulses applied to the integrating circuit as well
as the length of time of this duration.
These objects and other advantageous features of the present
invention may be better understood from a reading of the following
description when read in connection with the accompanying drawings
wherein:
FIG. 1 is a block diagram of a character generator system in
accordance with the principles of the present invention;
FIG. 2 A through I represent signal waveform diagrams helpful in
understanding the manner in which the character of FIG. 2A is
generated;
FIG. 3 illustrates a typical character core matrix which may be
used in accordance with the principles of the present
invention;
FIG. 4 schematically illustrates the deflection waveform generator
in accordance with the principles of the present invention;
FIG. 5 A through J illustrate the various character segments which
are used to generate a complete repetoire of characters using the
principles of the present invention; and
FIGS. 6A through C illustrate other characters which may be
generated in accordance with the principles of the present
invention.
Reference will now be made to FIG. 1 wherein a digital storage
register 2 for the storage of character selection signals in
accordance with the various conventional codes. The input to this
register may be coupled to the output of a computer or other
similar data generating or storage device. This storage register 2
has an output coupled to a conventional character decoder 4 which
decodes the particular character code supplied by the digital
register and selects a character set wire for that particular
character which is threaded in the character code matrix 6. The
exact nature of the character code matrix 6 will be described in
more detail hereinafter in connection with FIG. 4.
FIG. 1 also shows a clock pulse source 8 which generates a train of
pulses at a uniform pulse repetition frequency and supplies this
pulse train to a suitable distributor 10 which, for example, may be
a conventional ring counter. The outputs from the stages of this
ring counter or distributor 10 are supplied to the character core
matrix 6 as will be described in more detail hereinafter. The
output of the character core matrix is provided as a parallel input
to the deflection waveform generator 12 which utilizes the
information supplied thereto from the character core matrix 6 to
generate particular deflection waveforms characteristic of the
character decoder. After this waveform generation in the deflection
waveform generator, the deflection waveforms are supplied to a
suitable display device 14 such as via the deflection plates or
coils of a conventional cathode-ray tube.
In order to better understand the ensuing description of the system
of the present invention, reference is now made to FIG. 2 which
illustrates the actual technique utilized in forming the particular
characters desired.
FIG. 2A shows an upper case letter "A." The short intersecting
lines associated with this character divide the character into a
number of segments, in this case, nine segments. The segments are
drawn so that at the end of one segment the next segment begins and
that all the segments appear to be connected to form a set of
continuous linear lines having different slopes. FIG. 2B and FIG.
2F show the horizontal waveform 16 and the vertical waveform 18,
respectively, formed by the deflection waveform generator 12
previously referred to in connection with FIG. 1 These waveforms,
when applied to the deflection system of a cathode-ray tube, will
generate the character "A" as shown in FIG. 2A.
To obtain these waveforms the present invention utilizes the
concept of integrating a specified number of pulses during a
predetermined uniform period of time to provide a series of linear
waveforms of various slopes. To realize this, FIG. 2B illustrates a
first group of pulses 20 at a particular frequency, for example
f.sub.3, for a time duration equal to 6t. This period is
subdivisible into six equal time increments equal to t. Similarly,
another group of pulses 22 of a polarity opposite those of pulses
20 are shown occuring during a time period equal to 7t-6t, these
pulses 22 being of a similar frequency as were pulses 20 previously
referred to. Following these pulses 22, there occurs a third set of
pulses 24 having a frequency different than f.sub.3, for example, a
frequency f.sub.7. These pulses occur during the time interval
equal to 9t-7t, or during two equal increments of tine t.
FIG. 2F shows the vertical waveform 18 which may be generated by
integrating a first series of pulses 26 of a frequency f.sub.10
occurring for a duration equal to 3t, a second series of pulses 28
of an identical frequency but of an opposite polarity, and a third
set of pulses 27 equal in duration to a period of time t and a
frequency of f.sub.10. For the period of time between 7t and 9t no
pulses occur since the vertical deflection waveform has a constant
amplitude.
To further explain these waveforms 16 and 18, FIGS. 2C, D, and E
show the particular pulses generally designated by reference
numerals 21, 23 and 25, respectively, necessary in connection with
the operation of the deflection waveform generator to permit the
aforementioned pulse series of varying frequency to be integrated
thereby forming the particular deflection waveforms described.
Similarly, FIGS. 2G, H, and I show the pulses, generally designated
ny reference numerals 29, 31 and 33, respectively which permit the
generation of the particular pulse trains of varying frequency
previously alluded to. The broken vertical lines in some of the
pulses of these FIGS. indicate the substantially simultaneous
ending and beginning of two adjacent pulses. This has been shown in
favor of a complete pulse.
Reference will now be made to the deflection waveform generator of
FIG. 4 wherein certain conductors followed by the suffix "a" are
labeled with reference numerals identical to those used in FIGS.
2B--2I to designate particular pulses carried by these
conductors.
Basically, the deflection waveform generator 12 includes six pulse
sources or generators 30 each having its own unique frequency. As
shown in FIG. 4, these frequencies have been designated f.sub.2,
f.sub.3, f.sub.5, f.sub.7, f.sub.8, and f.sub.10. The output of
each pulse source 30 is connected to a pulse shaper and splitter
circuit 32 of conventional design to shape the pulses generated by
pulse source 30 into rectangular pulses of both polarities. Those
pulses having a positive polarity are provided at the output
designated by the positive sign while those pulses having a
negative polarity are provided at the output designated by the
negative sign. Each of the outputs from a pulse shaper and splitter
32 is provided generally to the input of two AND gates 34 and
36.
An exception to this are the pulse shaper and splitter circuits 32
associated with those pulse generators having the frequencies
f.sub.2, f.sub.3, and f.sub.7. In these cases, each output from the
shaper and splitter circuit is provided to only one AND gate. The
reasons for this exception will be seen in more detail as the
description proceeds.
Still referring to FIG. 4 and the deflection waveform generator 12,
the AND gates 34 have their outputs connected in common to the
input to a conventional current integrator 38 which may be a
capacitance circuit to produce an output voltage which is the
integral of the input current applied thereto. Similarly, the
output of AND gates 36 are connected in common to provide an input
to integrator circuit 40 which may be of similar design as
integrator 38. The outputs of these integrators are connected
through suitable amplifiers 42 and 44, respectively, to, for
example, electromagnetic deflection coils 46 and 48 to control the
horizontal and vertical displacement of the electron beam in the
conventional cathode-ray tube 14. In terms of the Cartesian
coordinates, x and y the pair of AND gates 34 whose outputs are
connected in common and which are associated with each frequency
source 30 influence the deflection of the electron beam either in
the positive x direction or negative x direction depending upon its
particular input from the pulse shaper and splitter circuit 32.
Accordingly, the pair of AND gates 36 whose outputs are connected
in common for each frequency source 30 control the deflection of
the electron beam in the positive y or negative y direction also
depending upon their input from the pulse shaper and splitter
circuit 32.
As FIG. 4 shows, each of the AND gates 34 and 36 have three inputs,
one of which, as previously described, originates from the
frequency pulse source 32. Another input is provided in the case of
AND gates 34 from a flip-flop 50. In the case of AND gates 36, this
second input is derived from flip-flop 52. The function of these
flip-flops will be described in more detail hereinafter.
The third input to the AND gates 34 and 36 originates from one of a
plurality of pulse generating circuits 54 which have been
designated t.sub.2x, t.sub.3x, t.sub.5x, t.sub.8x, t.sub.7x,
t.sub.10x, t.sub.8y, t.sub.5, and t.sub.10y. These pulse circuits
may be of any conventional design such as a monostable
multivibrator and function to produce upon a trigger signal at
their inputs a pulse having a specified and equal time duration
equal to t. The trigger signal which initiates the pulse from these
pulse sources 54 is delivered to terminals 55 through 63,
respectively, which correspond to identically designated output
terminals from the character core matrix 6 shown more fully in FIG.
3. The outputs of these pulse sources 54 are connected to the gates
identified by the subscript and the following "x" or "y"
designation. For example, the output of the pulse source designated
t.sub.2x is applied to the input of AND gates 34 associated with
the frequency pulse source 30 having a frequency f.sub.2.
In addition, the outputs of the pulse sources 54 having an "x"
designation are connected as inputs to a NOR gate 64 which provides
a reset input to flip-flop 50. The outputs of the three pulse
sources 54 having a "y" designation are also connected as inputs to
a NOR gate 66 which provides a reset input to flip-flop 52. The set
input of these flip-flops 50 and 52 are connected, respectively, to
input terminals 68 and 70 which also derive signals from the
character core matrix 6. The purpose of these flip-flops 50 and 52
is to control the application of the pulses of the proper polarity
through AND gates 34 and 36 depending upon the segment of the
character to be generated. This will become more evident in
connection with the description of the character core matrix of
FIG. 3.
Reference is now made to FIG. 3 which shows in detail the character
core matrix 6 previously referred to. This matrix comprises 14
columns of magnetic cores arrayed in 13 rows, each column
representing a segment in a character which can be generated in
accordance with the principles of the present invention. Input
signals are received from the character decoder 4 previously
alluded to in connection with FIG. 1. The matrix then produces in
parallel pulses at its output terminals which ultimately effect the
deflection waveform supplied to the cathode-ray tube display device
14. As shown in FIG. 3, the character core matrix utilizes bistable
magnetic cores 72 as the bistable elements, however, other suitable
bistable elements may be employed as well. These magnetic cores are
made of any suitable magnetic material having two opposed stable
states of magnetic remanence which are designated the zero state
and the one state in accordance with convention. Initially, all of
the cores of the matrix are in a zero state which may be altered by
the application of a magnetizing field applied to any one of the
cores by means of a set wire threaded through the core or
combination thereof. When this positive magnetizing field is of
sufficient intensity, the core is switched from the zero state to
the one state. Subsequent application of a negative magnetizing
field of sufficient intensity by means of a reset wire threaded
through the core causes the core to be switched from the remanence
condition representing the one state to the remanence condition
representing the zero state. When the core switches from the one
state to the zero state, an output pulse is generated on an output
or read wire also threaded through the core.
For purposes of discussion and in the interest of clarity, only one
set wire 74, for the character "A," is illustrated. It should be
realized however that there is one set wire for each character to
be displayed and each of these set wires is connected to character
decoder 4.
As shown, the set wire 74 for the character "A" actually consists
of two electrically parallel set wires, one designated A.sub.x and
the other designated A.sub.y. These wires are threaded through
particular cores in a manner to be explained hereinafter.
An output terminal representing each stage of the distributor or
ring counter 10 is connected to one of the input terminals 76 which
is coupled to the reset wire 78. These reset wires are
conventionally threaded through every core in the column. The
connection of these reset wires to the ring counter 10 is such so
as to permit the sequential energization of the reset wires as the
ring counter advances. For purposes of discussion, it may be
assumed that the wires are energized in a sequence beginning from
the left and going to the right of the FIG. is viewed. As the ring
counter advances, negative magnetizing pulses are applied
sequentially to the column reset wires of the character core
matrix. These negative magnetizing pulses cause those cores in the
one state in that particular column to return to the zero state.
The cores which have not been set to the one state remain in the
zero state upon application of the negative reset magnetizing
field.
Through every core in a particular row, there is threaded a read
wire 80 which is connected to an output terminal corresponding in
reference numeral to an input terminal of the deflection waveform
generator of FIG. 4. The energization of the reset wire for each
column of the character core matrix generates the read pulses which
will ultimately draw a particular line segment of a character on
the screen of the cathode-ray tube. As shown in FIG. 3, there are
14 columns in the matrix, thereby limiting the number of characters
which can be drawn to those which require 14 or less segments.
However, any number of characters may be synthesized within the 14
segments. Obviously, if it was desirable to synthesize character of
more complexity than those using 14 segments, the number of columns
in the core matrix could be increased to accommodate these more
complex characters or symbols.
Referring now to FIGS. 2, 3, and 4, a typical operation of the
circuit constructed in accordance with the principles of the
present invention will be described in generating the character
"A." Assuming that the character decoder has identified the coded
character stored in the storage register 2 and a particular set
wire 74 is energized in the character core matrix. Those cores in
the character core matrix which are threaded by this set wire are
changed from their zero state to their one state.
At this point the ring counter commences its advancement, resetting
the cores in the first column. This generates an output pulse at
terminals 56 and 63 which initiate a timed pulse of duration t at
the output of pulse generators 54 designated t.sub.3 x and t.sub.10
y, respectively. These timed pulses are applied to the input of AND
gates 34 and 36, respectively, associated with frequency sources
f.sub.3 and f.sub.10.
With flip-flops 50 and 52 in their initial reset condition, these
AND gates 34 and 36 are enabled to pass a specified number of
pulses from their respective pulse shaper and splitter circuits 32
depending upon the frequency of the pulse source 30 associated
therewith. These pulses are applied to the current integrating
circuits 38 and 40 which integrate the succession of pulses into a
substantially linear ramp signal which deflects the electron beam
in the display device 14 accordingly.
The ring counter then advances one stage to reset the cores
associated with the second column thereby generating two or more
read or trigger pulses at output terminals 56 and 63 respectively.
As was the case previously described, these pulses initiate, in the
example of the character "A," a similar number of pulses to be
integrated by current integrators 38 and 40 to deflect the beam
again. This process is repeated until the character "A" has been
completely traced on the screen of the cathode-ray tube.
As shown in FIG. 3, before grounding the A.sub.x branch of set wire
74, the set wire is threaded through a core associated with read
wire 82 and output terminal 84. This core is in the same column as
the last core threaded for this particular character. The read
pulse generated when this core is reset to its zero condition may
be utilized to reset the distributor 10 rather than have it
continue through the remaining five columns.
Since some of the signals associated with the generation of the
character "A" require negative pulses to be integrated to generate
a negative x or negative y deflection, additional read wires 86 and
88 are provided to generate a signal at output terminals 68 or 70,
respectively, which indicates the times a pulse from one of the
pulse generators 54 is to be applied to a gate associated with the
negative output of the pulse shaper and splitter circuit 32. This
decision is made by flip-flop 50 or 52, depending upon whether it
is a negative x or negative y signal. In either case, one of these
flip-flops is set to provide a disabling signal to AND gate 34 or
36 and an enabling signal to AND gates 34 or 36 which permit
negative pulses to pass to the integrating circuit during the
generation of the timed pulse from generator 34. As the trailing
edge of this timed pulse occurs, flip-flop 50 or 52 is reset via
the connection between the reset input of the flip-flop and NOR
gate 64 or 66.
Also, in the generation of particular characters, it is necessary
and desirable to blank the beam of the cathode-ray tube during the
deflection thereof over a particular segment of the character being
synthesized. In order to accomplish this, an additional row of
cores associated with read wire 90 are provided in the character
core matrix and are associated with output terminal 92. This output
terminal is connected to a suitable circuit 94 such as a monostable
multivibrator of similar design as pulse generators 54. This
circuit upon the receipt of a read pulse at output terminal 92
generates a pulse of sufficient amplitude and polarity to block the
cathode-ray beam from striking the screen of the cathode-ray tube.
The duration of this blocking signal is equal to the duration of
the pulses generated by any one of the pulse generators 54. In this
manner, any character or symbol may be generated and displayed.
As may be obvious from the above explanation, the interval between
advancement in the distributor preferably is equal to the time t so
as to permit the completion of each segment of the character before
resetting the next column in the character core matrix.
It should also be noted that FIG. 2 is presented for purposes of
illustration only and the waveforms included therein are shown in
idealized form. The frequencies and pulse widths are not exact and
are provided for their relative value at best.
Referring now to FIG. 5, there is shown in relative perspective
actual character components or line segments utilized in accordance
with the principles of the present invention to make up a
particular font of characters which can be generated and displayed.
Associated with each segment is the frequency at which this
particular line slope and length may be generated with the
selection of the proper time interval. The particular frequencies
are a matter of choice depending upon the font desired and it is
not necessary to specify the frequencies involved except to the
extent that the subscripts indicate the relative frequencies they
designate. For example, frequency f.sub.5 is greater than the
frequency f.sub.3 and less than the frequency f.sub.10. Obviously,
if one of the components or line segments illustrated in FIG. 5 may
be in any desired quadrant of the Cartesian coordinates by
selecting the proper polarity of the pulses to be integrated.
FIG. 6 shows three exemplary characters which may be generated
using the line segments of FIG. 5 in the concepts of the present
invention.
Upon the completion of the display of one character, it is
necessary to position the beam to another initial point so that the
next character may be displayed without interferring with the
persistent display of the former adjacent character. This
repositioning circuit is not necessarily described here since it is
well known to provide conventional circuits in such electronic
character generating systems. However, the pulse generated at
output terminal 84 of the character core matrix of FIG. 4
previously alluded to for purposes of resetting the distributor or
ring counter 10 may be used to generate proper deflection voltages
to cause the beam to be repositioned at a new initial reference
position from which the next character may be initiated. This
reference position may be the lower left-hand corner of the space
allotted for the next successive character. Upon receipt or
generation of this read pulse at output terminal 84, the beam could
then be deflected to its new reference position.
While the invention has been described with reference to the
circuit disclosed herein, it is not confined to the details set
forth since it is apparent that certain electrical equivalent
components may be substituted for the components of the preferred
circuit without departing from the scope of the invention.
The invention is, therefore, to cover such modifications or changes
as may come within the scope of the invention as defined by the
following claims:
* * * * *